tekHPoynt

by: Allan B. Dizon
The following set of rules will apply in most instances. If you should ever feel a need to intentionally violate these rules make certain that you fully understand the consequences.

a. Never functionally test an input pin as if it were an output. This can be accomplished by accidentally setting the output compare mask on an input pin.

b. Never connect a tester pin driver to an output pin of a DUT. The result of this action will cause the test system and the device pin to both drive voltage and current at the same point, at the same time.

c. Never float an input pin. A valid logic 0 or 1 level must always be supplied to an input. Floating CMOS inputs may result in the device latching-up and cathastropic failures.

d. Never supply a voltage which is above VDD or below ground to an input pin or output pin. This may cause a CMOS device latchup.

e. Always, when forcing voltage, set a current clamp to limit the amount of current provided by the test system.

f. Always, when forcing current, set a voltage clamp to limit the amount of voltage provided by the test system.

g. Never change a force or sense range of the tester when directly connected to a device pin.